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Digital Electronics
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- Design all the basic gates NOT, AND, OR, NAND, NOR, XOR, XNOR using 2:1 Multiplexer.
by fod-Dalo on Sat Feb 02, 2008 9:09 am - 2 Replies
- 572 Views
- Last post by alok.ahuja
on Mon Jul 05, 2010 7:01 pm
- Design all the basic gates NOT, AND, OR, NAND, NOR, XOR, XNOR using 2:1 Multiplexer.
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- What is metastability and how to prevent it?
by fod-Dalo on Sat Jan 19, 2008 12:01 pm - 2 Replies
- 1584 Views
- Last post by saraba83
on Fri Oct 10, 2008 9:29 am
- What is metastability and how to prevent it?
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- What is race condition?
by fod-Dalo on Thu Jan 10, 2008 10:12 pm - 2 Replies
- 1171 Views
- Last post by fod-Dalo
on Thu Aug 21, 2008 12:54 am
- What is race condition?
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- What is an LFSR? List a few of its industry applications.
by fod-Dalo on Sat Feb 02, 2008 9:11 am - 1 Replies
- 697 Views
- Last post by alok.ahuja
on Tue Apr 01, 2008 2:05 pm
- What is an LFSR? List a few of its industry applications.
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- How can you convert an SR Flip-flop to a JK Flip-flop
by amit on Tue Dec 25, 2007 4:50 pm - 1 Replies
- 641 Views
- Last post by alok.ahuja
on Fri Mar 28, 2008 10:42 pm
- How can you convert an SR Flip-flop to a JK Flip-flop
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- What is metastablity? How does it occur?
by fod-Dalo on Thu Jan 10, 2008 10:06 pm - 1 Replies
- 522 Views
- Last post by alok.ahuja
on Fri Mar 28, 2008 10:17 pm
- What is metastablity? How does it occur?
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- Why are most interrupts active low?
by fod-Dalo on Sat Jan 19, 2008 12:02 pm - 1 Replies
- 632 Views
- Last post by alok.ahuja
on Thu Mar 27, 2008 11:29 pm
- Why are most interrupts active low?
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- Design 4-bit synchronous counter?
by fod-Dalo on Thu Jan 10, 2008 10:14 pm - 1 Replies
- 474 Views
- Last post by indiaIsRising
on Thu Mar 27, 2008 4:20 pm
- Design 4-bit synchronous counter?
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- Design a 2 bit counter using D Flip-Flop.
by fod-Dalo on Thu Jan 10, 2008 10:03 pm - 1 Replies
- 501 Views
- Last post by indiaIsRising
on Thu Mar 27, 2008 1:25 pm
- Design a 2 bit counter using D Flip-Flop.
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- what are the differences between SIMULATION and SYNTHESIS
by bluesky on Sat Dec 29, 2007 8:36 pm - 1 Replies
- 471 Views
- Last post by alok.ahuja
on Wed Mar 26, 2008 1:08 am
- what are the differences between SIMULATION and SYNTHESIS
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- Give two ways to convert. a two inp. NAND gate to a inverter
by bluesky on Sat Dec 29, 2007 8:40 pm - 1 Replies
- 503 Views
- Last post by pankypal
on Tue Mar 25, 2008 8:50 pm
- Give two ways to convert. a two inp. NAND gate to a inverter
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- How can you convert an JK Flip-flop to a D Flip-flop
by amit on Tue Dec 25, 2007 4:50 pm - 1 Replies
- 455 Views
- Last post by indiaIsRising
on Tue Mar 25, 2008 4:24 pm
- How can you convert an JK Flip-flop to a D Flip-flop
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- Design D Latch from SR flip-flop.
by fod-Dalo on Thu Jan 10, 2008 10:10 pm - 1 Replies
- 470 Views
- Last post by indiaIsRising
on Tue Mar 25, 2008 12:40 pm
- Design D Latch from SR flip-flop.
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- Difference between mealy and moore state-machines?
by fod-Dalo on Thu Jan 10, 2008 10:19 pm - 1 Replies
- 707 Views
- Last post by fod-Dalo
on Mon Feb 18, 2008 6:44 pm
- Difference between mealy and moore state-machines?
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- Question on Flip Flop and Latch
by Ashish Kumar on Mon Dec 10, 2007 7:44 am - 4 Replies
- 1105 Views
- Last post by fod-Dalo
on Fri Feb 08, 2008 12:45 pm
- Question on Flip Flop and Latch
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- Minimize: S= A' + AB
by fod-Dalo on Wed Feb 06, 2008 11:03 pm - 1 Replies
- 471 Views
- Last post by pankypal
on Thu Feb 07, 2008 12:49 pm
- Minimize: S= A' + AB
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- Design a FSM to detect 10110. What is the minimum number of flops required?
by fod-Dalo on Wed Feb 06, 2008 11:07 pm - 0 Replies
- 447 Views
- Last post by fod-Dalo
on Wed Feb 06, 2008 11:07 pm
- Design a FSM to detect 10110. What is the minimum number of flops required?
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- Design a 2bit up/down counter with clear using gates.
by fod-Dalo on Wed Feb 06, 2008 11:06 pm - 0 Replies
- 367 Views
- Last post by fod-Dalo
on Wed Feb 06, 2008 11:06 pm
- Design a 2bit up/down counter with clear using gates.
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- Finite state machine to give a modulo 3 counter when x=0 and modulo 4 counter when x=1
by fod-Dalo on Wed Feb 06, 2008 11:04 pm - 0 Replies
- 419 Views
- Last post by fod-Dalo
on Wed Feb 06, 2008 11:04 pm
- Finite state machine to give a modulo 3 counter when x=0 and modulo 4 counter when x=1
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- Finite state machine that will detect three consecutive coin tosses that results in heads.
by fod-Dalo on Wed Feb 06, 2008 11:00 pm - 0 Replies
- 337 Views
- Last post by fod-Dalo
on Wed Feb 06, 2008 11:00 pm
- Finite state machine that will detect three consecutive coin tosses that results in heads.
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- How the flip-flop behaves ...
by fod-Dalo on Thu Jan 10, 2008 9:58 pm - 1 Replies
- 397 Views
- Last post by fod-Dalo
on Wed Feb 06, 2008 12:56 pm
- How the flip-flop behaves ...
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- What is the difference between a EEPROM and FLASH?
by fod-Dalo on Thu Jan 10, 2008 10:16 pm - 1 Replies
- 453 Views
- Last post by amit
on Sun Feb 03, 2008 2:07 pm
- What is the difference between a EEPROM and FLASH?
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- In a 3-bit Johnson's counter what are the unused states?
by fod-Dalo on Sat Feb 02, 2008 9:10 am - 0 Replies
- 368 Views
- Last post by fod-Dalo
on Sat Feb 02, 2008 9:10 am
- In a 3-bit Johnson's counter what are the unused states?
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- How will you implement a full subtractor from a full adder?
by fod-Dalo on Sat Feb 02, 2008 9:09 am - 0 Replies
- 436 Views
- Last post by fod-Dalo
on Sat Feb 02, 2008 9:09 am
- How will you implement a full subtractor from a full adder?
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- Design an OR gate from 2:1 MUX?
by fod-Dalo on Thu Jan 10, 2008 10:01 pm - 1 Replies
- 383 Views
- Last post by fod-Dalo
on Thu Jan 31, 2008 2:44 pm
- Design an OR gate from 2:1 MUX?
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- After how many clock cycles will it return to the initial state
by fod-Dalo on Sat Jan 19, 2008 12:54 pm - 1 Replies
- 416 Views
- Last post by fod-Dalo
on Sat Jan 19, 2008 1:22 pm
- After how many clock cycles will it return to the initial state
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- Difference b/w latch based design and flip-flop based design
by fod-Dalo on Sat Jan 19, 2008 12:00 pm - 1 Replies
- 455 Views
- Last post by pankypal
on Sat Jan 19, 2008 12:51 pm
- Difference b/w latch based design and flip-flop based design
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- Design a 4-input NAND gate using only two-input NAND gates
by fod-Dalo on Sat Jan 19, 2008 12:01 pm - 0 Replies
- 683 Views
- Last post by fod-Dalo
on Sat Jan 19, 2008 12:01 pm
- Design a 4-input NAND gate using only two-input NAND gates
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- Implement comparator using combinational logic
by fod-Dalo on Thu Jan 10, 2008 10:18 pm - 0 Replies
- 356 Views
- Last post by fod-Dalo
on Thu Jan 10, 2008 10:18 pm
- Implement comparator using combinational logic
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- Difference between a NAND-based Flash and NOR-based Flash?
by fod-Dalo on Thu Jan 10, 2008 10:17 pm - 0 Replies
- 378 Views
- Last post by fod-Dalo
on Thu Jan 10, 2008 10:17 pm
- Difference between a NAND-based Flash and NOR-based Flash?
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- Design a 16 byte asynchronous FIFO?
by fod-Dalo on Thu Jan 10, 2008 10:15 pm - 0 Replies
- 368 Views
- Last post by fod-Dalo
on Thu Jan 10, 2008 10:15 pm
- Design a 16 byte asynchronous FIFO?
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- Design 4-bit asynchronous counter?
by fod-Dalo on Thu Jan 10, 2008 10:15 pm - 0 Replies
- 337 Views
- Last post by fod-Dalo
on Thu Jan 10, 2008 10:15 pm
- Design 4-bit asynchronous counter?
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- Design a 4 bit Gray Counter?
by fod-Dalo on Thu Jan 10, 2008 10:12 pm - 0 Replies
- 353 Views
- Last post by fod-Dalo
on Thu Jan 10, 2008 10:12 pm
- Design a 4 bit Gray Counter?
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- What do you mean by Clock Skew?
by fod-Dalo on Thu Jan 10, 2008 10:11 pm - 0 Replies
- 375 Views
- Last post by fod-Dalo
on Thu Jan 10, 2008 10:11 pm
- What do you mean by Clock Skew?
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- Design a D and T flip flop using 2:1 mux ?
by fod-Dalo on Thu Jan 10, 2008 10:09 pm - 0 Replies
- 333 Views
- Last post by fod-Dalo
on Thu Jan 10, 2008 10:09 pm
- Design a D and T flip flop using 2:1 mux ?
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- Design an Inverter in two different ways, using NAND gate.
by fod-Dalo on Thu Jan 10, 2008 10:08 pm - 0 Replies
- 332 Views
- Last post by fod-Dalo
on Thu Jan 10, 2008 10:08 pm
- Design an Inverter in two different ways, using NAND gate.
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- Design a FSM to detect sequence "101" in input sequence?
by fod-Dalo on Thu Jan 10, 2008 10:07 pm - 0 Replies
- 410 Views
- Last post by fod-Dalo
on Thu Jan 10, 2008 10:07 pm
- Design a FSM to detect sequence "101" in input sequence?
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- Design a 3:8 decoder?
by fod-Dalo on Thu Jan 10, 2008 10:06 pm - 0 Replies
- 335 Views
- Last post by fod-Dalo
on Thu Jan 10, 2008 10:06 pm
- Design a 3:8 decoder?
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- Design a Transparent Latch using a 2:1 Mux
by fod-Dalo on Thu Jan 10, 2008 10:05 pm - 0 Replies
- 423 Views
- Last post by fod-Dalo
on Thu Jan 10, 2008 10:05 pm
- Design a Transparent Latch using a 2:1 Mux
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- Design a 4:1 Mux using 2:1 Mux's?
by fod-Dalo on Thu Jan 10, 2008 10:04 pm - 0 Replies
- 395 Views
- Last post by fod-Dalo
on Thu Jan 10, 2008 10:04 pm
- Design a 4:1 Mux using 2:1 Mux's?
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- Draw a Transmission Gate-based D-Latch?
by fod-Dalo on Thu Jan 10, 2008 10:00 pm - 0 Replies
- 443 Views
- Last post by fod-Dalo
on Thu Jan 10, 2008 10:00 pm
- Draw a Transmission Gate-based D-Latch?
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- Design a divide by two counter using D-Latch?
by fod-Dalo on Thu Jan 10, 2008 9:59 pm - 0 Replies
- 393 Views
- Last post by fod-Dalo
on Thu Jan 10, 2008 9:59 pm
- Design a divide by two counter using D-Latch?
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- Why latches are not preferred in synthesized design?
by fod-Dalo on Thu Jan 10, 2008 9:40 pm - 0 Replies
- 357 Views
- Last post by fod-Dalo
on Thu Jan 10, 2008 9:40 pm
- Why latches are not preferred in synthesized design?
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- XOR using NAND gates
by amit on Mon Dec 17, 2007 12:47 am - 1 Replies
- 528 Views
- Last post by fod-Dalo
on Thu Jan 10, 2008 9:43 am
- XOR using NAND gates
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- Give a circuit to divide frequency of clock cycle by two
by bluesky on Sat Dec 29, 2007 8:47 pm - 2 Replies
- 514 Views
- Last post by fod-Dalo
on Sun Jan 06, 2008 9:10 pm
- Give a circuit to divide frequency of clock cycle by two
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- What is capacitive coupling and how it impact the design?
by fod-Dalo on Sun Dec 16, 2007 1:40 am - 1 Replies
- 515 Views
- Last post by bsingh
on Sun Jan 06, 2008 8:57 pm
- What is capacitive coupling and how it impact the design?
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- How do you detect if two 8-bit signals are same?
by bluesky on Sat Dec 29, 2007 8:44 pm - 1 Replies
- 434 Views
- Last post by bsingh
on Sun Jan 06, 2008 8:52 pm
- How do you detect if two 8-bit signals are same?
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- Design a circuit to detect when 3 and only 3 bits are set ou
by amit on Tue Dec 25, 2007 4:52 pm - 1 Replies
- 480 Views
- Last post by bsingh
on Sun Jan 06, 2008 8:43 pm
- Design a circuit to detect when 3 and only 3 bits are set ou
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- How do you detect a sequence of "1101" arriving serially
by bluesky on Sat Dec 29, 2007 8:46 pm - 1 Replies
- 581 Views
- Last post by bsingh
on Sun Jan 06, 2008 8:30 pm
- How do you detect a sequence of "1101" arriving serially
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- Design a divide-by-3 sequential circuit with 50% duty circle
by bluesky on Sat Dec 29, 2007 8:47 pm - 2 Replies
- 590 Views
- Last post by bsingh
on Wed Jan 02, 2008 8:09 pm
- Design a divide-by-3 sequential circuit with 50% duty circle
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